32-bit ARM CortexTM-M23 - NuMicro® Family
M2354 Series The series of NuMicro Family 32-bit microcontrollers based on the ARM Cortex-M23 core, and empowered by the ARM TrustZone technology for ARMv8-M architecture to enhance the traditional firmware security to a new level of robust software security. They have security features that have been Arm® PSA Certified™ Level 1, Level 2 and Level 3 and also have the physical level (chip-level) security protection function. With TrustZone technology implemented, memory and peripherals could be divided into secure and non-secure regions to achieve data integrity, firmware update, and operation security. These microcontrollers are mainly designed to realize robust IoT security applications. All Ics are RoHS compliant.
* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.
Chip |
Description |
Application Flash | SRAM | Data Flash | Loader Flash | Programm. methods | Clock frequency | Supply voltage [V] | Operating temperature [°C] | Package | Status * | M2354KJFAE (3973 KB) - Platform Security Architecture (PSA) Certified Level 1, Level 2 and Level 3
- TrustZone technology for ARMv8-M architecture
- operating frequency up to 96 MHz
- programmable system clock source
- 2 external crystal oscillators and 3 internal RC oscillators
- up to 200 MHz on-chip PLL
- 32-bit hardware multiplier / divider
- eXecute-Only-Memory ( XOM ) to secure critical program codes
- 3 KB OTP ROM with additional lock bits
- hardware crypto accelerators: AES-256, SHA-512, HMAC-512, ECC and RSA-4096
- True Random Number Generator ( TRNG ) for data encryption
- 6 tamper pins
- up to 106 I/O pins
- 4 x 32-bit timers
- RTC
- Watchdog
- interfaces: 6 x UART, 2 x USCI (Universal Serial Control Interface configured as UART, SPI or I2C), 1 x QSPI, 4 x SPI / I2S, 3 x I2C, 1 x CAN, 2 x LIN, 3 x SC ( ISO-7816-3), 1 x SDHC, 16/8-bits EBI, 4 x I2S) / AC97, USB 2.0 FS OTG, USB 1.1 Host, USB 2.0 FS Device
- VAI (Voltage Adjustable Interface)
- 16-channel PDMA
- 24-channel 16-bit PWM
- 16-channel 12-bit ADCs
- 2-channel 12-bit DAC
- external VREF pin or internal reference voltage VREF
- 2 x analog comparator
- LCD driver
- 128-bit Unique ID (UID) and 128-bit Unique Customer ID (UCID)
- LDO regulator
- power saving modes: Idle, Power-down, Standby Power-down, and Deep Power-down
| 1024 KB | 256 KB | 8 KB | 16 KB | ISP ICP IAP | Ext. crystal: 4 - 24 MHz 32.768 kHz
Int. RC: 12 MHz 48 MHz 32 kHz | 1.7 – 3.6 | -40 – +105 | LQFP-128 | P | | M2351LJFAE (3973 KB) - Platform Security Architecture (PSA) Certified Level 1, Level 2 and Level 3
- TrustZone technology for ARMv8-M architecture
- operating frequency up to 96 MHz
- programmable system clock source
- 2 external crystal oscillators and 3 internal RC oscillators
- up to 200 MHz on-chip PLL
- 32-bit hardware multiplier / divider
- eXecute-Only-Memory ( XOM ) to secure critical program codes
- 3 KB OTP ROM with additional lock bits
- hardware crypto accelerators: AES-256, SHA-512, HMAC-512, ECC and RSA-4096
- True Random Number Generator ( TRNG ) for data encryption
- 1 tamper pin
- up to 40 I/O pins
- 4 x 32-bit timers
- RTC
- Watchdog
- interfaces: 6 x UART, 2 x USCI (Universal Serial Control Interface configured as UART, SPI or I2C), 1 x QSPI, 3 x SPI / I2S, 3 x I2C, 1 x CAN, 2 x LIN, 3 x SC ( ISO-7816-3), 1 x SDHC, 16/8-bits EBI, 3 x I2S) / AC97, USB 2.0 FS OTG, USB 1.1 Host, USB 2.0 FS Device
- VAI (Voltage Adjustable Interface)
- 16-channel PDMA
- 24-channel 16-bit PWM
- 11-channel 12-bit ADCs
- 2-channel 12-bit DAC
- external VREF pin or internal reference voltage VREF
- 2 x analog comparator
- LCD driver
- 128-bit Unique ID (UID) and 128-bit Unique Customer ID (UCID)
- LDO regulator
- power saving modes: Power-down, Standby Power-down, and Deep Power-down
| 1024 KB | 256 KB | 8 KB | 16 KB | ISP ICP IAP | Ext. crystal: 4 - 24 MHz 32.768 kHz
Int. RC: 12 MHz 48 MHz 32 kHz | 1.7 – 3.6 | -40 – +105 | LQFP-48 | P | | M2351SJFAE (3973 KB) - Platform Security Architecture (PSA) Certified Level 1, Level 2 and Level 3
- TrustZone technology for ARMv8-M architecture
- operating frequency up to 96 MHz
- programmable system clock source
- 2 external crystal oscillators and 3 internal RC oscillators
- up to 200 MHz on-chip PLL
- 32-bit hardware multiplier / divider
- eXecute-Only-Memory ( XOM ) to secure critical program codes
- 3 KB OTP ROM with additional lock bits
- hardware crypto accelerators: AES-256, SHA-512, HMAC-512, ECC and RSA-4096
- True Random Number Generator ( TRNG ) for data encryption
- 1 tamper pin
- up to 50 I/O pins
- 4 x 32-bit timers
- RTC
- Watchdog
- interfaces: 6 x UART, 2 x USCI (Universal Serial Control Interface configured as UART, SPI or I2C), 1 x QSPI, 4 x SPI / I2S, 3 x I2C, 1 x CAN, 2 x LIN, 3 x SC ( ISO-7816-3), 1 x SDHC, 16/8-bits EBI, 4 x I2S) / AC97, USB 2.0 FS OTG, USB 1.1 Host, USB 2.0 FS Device
- VAI (Voltage Adjustable Interface)
- 16-channel PDMA
- 24-channel 16-bit PWM
- 16-channel 12-bit ADCs
- 2-channel 12-bit DAC
- external VREF pin or internal reference voltage VREF
- 2 x analog comparator
- LCD driver
- 128-bit Unique ID (UID) and 128-bit Unique Customer ID (UCID)
- LDO regulator
- power saving modes: Power-down, Standby Power-down, and Deep Power-down
| 1024 KB | 256 KB | 8 KB | 16 KB | ISP ICP IAP | Ext. crystal: 4 - 24 MHz 32.768 kHz
Int. RC: 12 MHz 48 MHz 32 kHz | 1.7 – 3.6 | -40 – +105 | LQFP-64 | P | |
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