32-bit ARM9 Microprocessors

N3292 H.264 Codec Series

The series of specialized, low voltage microprocessors based on ARM926EJ-S core, with rich peripherals and interfaces, equipped with JPEG codec, H.264 and MJPEG video codecs and Sound Processing Unit. They are designed for multimedia applications.

* Status: P - mass production, S - samples, UD - under development, N - not recommended for new design.

Chip Description  SRAM     SDRAM    Supply
  voltage  
[V] 		Clock
  frequency  		 Operating
temperature
[°C]		    Package    Status *
N32925U3DN
 (191 kB)
  • ARM926EJ-S core
  • operating frequency up to 240 MHz
  • 2 external crystal oscillators and one internal RC oscillator
  • PLL controller (the source of system clock up to 240 MHz)
  • multi-chip package (MCP), SDRAM is stacked inside the MCP
  • system booting modes: SD card, NAND Flash and SPI Flash memories, USB
  • 8 KB I-cache and 8 KB D-cache
  • 11-ch DMA controller
  • up to 80 GPIOs
  • four 32-bit timers
  • 24-bit Watchdog
  • RTC
  • 32 interrupts
  • 5-ch 10-bit ADC
  • 16-bit audio ADC for MIC input
  • 16-bit stereo DAC
  • TV output
  • JPEG codec
  • H.264 and MJPEG video codecs; max. resolution: D1 (720x480) @ TV output (@25 fps) and 1024x768 @ TFT LCD panel
  • Sound Processing Unit
  • interfaces: UART, 2 x SPI, I2C, I2S, USB 1.1 Host and USB 2.0 HS Device, 3 x SD/SDIO/SDHC/MMC/MicroSD and NAND Flash memories, JTAG, CMOS image sensor interface (compliant with CCIR601 / CCIR656), 4/5-wire touch panel
  • 4-channel 16-bit PWM
 8 KB 16M x 16 bit
DDR2		 Core: 1.2V ±10%

I/O: 3.3V ±10%		 Ext. crystal:
27 MHz / 12 MHz
&
32.768 kHz

Int. RC:
32 kHz		 -20 – +85 LQFP-128
(MCP)		 P
N32926U1DN
 (191 kB) 		8 KB 32M x 16 bit
DDR2		 Core: 1.2V ±10%

I/O: 3.3V ±10%		 Ext. crystal:
27 MHz / 12 MHz
&
32.768 kHz

Int. RC:
32 kHz		 -20 – +85 LQFP-128
(MCP)		 P